(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices and more particularly, to a new construction for a ground connection that will enable effective and rapid evaluation of wire bond related defects.
(2) Description of the Prior Art
Quad Flat Packages (QFP) have in the past been used to create surface mounted, high pin count integrated packages with various pin configurations. The electrical connections with these packages are typically established by closely spaced leads that are distributed along the four edges of the flat package. This limits the usefulness of the QFP since a high I/O count cannot be accommodated in this manner. To address this problem, the Ball Grid Array (BGA) package has been created whereby the I/O points for the package are distributed not only around the periphery of the package but over the complete bottom of the package. The BGA package can therefore support more I/O points making this a more desirable package for high circuit density with high I/O count. The BGA contact points are solder balls that in addition facilitate the process of flow soldering of the package onto a printed circuit board. The solder balls can be mounted in an array configuration and can use 40, 50 and 60 mil spacings in a regular or staggered pattern.
The development of the Ball Grid Array (BGA) devices has offered the opportunity to spread device I/O interconnect points over the entire surface of the device, this as opposed to having I/O connect points available only around the periphery of the IC device. Typically, the BGA package is surface mounted on a motherboard (a Printed Circuit Board or PCB). The concerns of making reliable I/O interconnects are thereby shifted from fine pitch in-line lines to-contact balls. General sizes that are currently in use for Quad Flat Pack (QFP) packages are a footprint in the 25xc3x9725 mm range, a lead pitch of around 0.5 mm while the package itself is about 2 mm thick. A typical ball pitch for a BGA package is around 1.5 mm, with a footprint similar in size to the QFP package and a package thickness similar or slightly less than the thickness of a QFP package.
In order to test a BGA device, the contactor elements of the BGA device are inserted into a contactor plate having a plurality of sockets. The contactor plate is coupled to a Device Under Test (DUT) loadboard, which is coupled to a testing machine. The DUT loadboard is in essence a printed circuit board that completes electrical connections between the BGA contactor elements via the contactor plate and the tester. In order to test the BGA device, the tester sends signals to and receives signals from the BGA device via the electrical conductor paths provided by the contactor plate and the DUT board.
In assembling a BGA package to a PCB, the lower surface of the PCB is typically provided with contact balls that connect to an interfacing network of conducting lines that connect to surrounding electrical components or systems. A typical PCB contains two layers of interconnect metal. A cavity is typically formed in the upper surface of the PCB, the semiconductor device that is to be mounted on the PCB is inserted into this cavity. The contact balls of the BGA make electrical contact with the layers of interconnect metal in the PCB, the BGA die is further wire bonded to the PCB and enclosed in a molded casing. The operation of wire bonding limits the size of the surface on which the wire is connected, which in turn increases the size of the die that can be used. The side of the BGA that faces the PCB in this arrangement is the backside of the IC die, heat exchange between the BGA die and the underlying PCB takes place through this interface of the BGA die with the PCB. Since signal lines (in the PCB) are typically of fine line construction, these lines do not lend themselves to provide a good path for heat exchange. The heat exchange between the BGA and the PCB must therefore depend on (wider or larger in cross section) ground planes in the PCB, which brings with it limitation on the space that is available to route signal lines in the PCB.
At present the final testing of semiconductor Integrated Circuits is performed using Integrated Circuit Handler apparatus whereby each of the IC packages is handled as an individual unit and is advanced to the test socket of the DUT by either gravity feed or by using pick and place methods.
Mass production of semiconductor Integrated Circuits (IC""s) brings with it the requirement that these IC""s can be tested at high speed. Current trends in the semiconductor industry also promote convenient and bulk handling of semiconductor chips. While high speed testing has been current practice in the industry for a number of years, this testing in most cases handles individual chips. While in the test position, the chips must be contacted in a rapid and dependable way so that the chip can be tested. This contacting of the chip while the chip is in the position where it can be tested is done by means of probe sockets. These probe sockets are required to rapidly and dependably contact the semiconductor devices under test for the purpose of testing these devices.
During testing of the BGA device, it is important that proper ground connection are provided between the device under test and the test equipment. One of the assembly aspects of mounting a BGA device on a PCB is to test the quality of connection that is made in wire bonding the BGA device to the PCB. This connection must be a low resistivity connection, which means that the detection of non-stick conditions, whereby the wire bond connection is a high resistivity connection, is required. Current design for the testing of singulated ball grid array devices has no ground land connection on the BGA assembly. This ground land connection is required in order to activate the test capability of a wire bond apparatus that tests for high quality wire bond connections to the BGA device. This lack of a ground land on the BGA assembly makes the detection of the non-stick condition difficult and unreliable. The groung land of the invention addresses this problem by providing a ground land on the BGA assembly, which allows for activation of the test capability of the wire bond apparatus that evaluates the resistivity of the wire bond connections that have been made to the BGA device. The quality of the wire bonding process can therefore be readily monitored.
U.S. Pat. No. 5,998,228 (Eldridge et al.) shows a method of testing a separated a chip that uses a ground.
U.S. Pat. No. 5,983,493 (Eldridge et al.) shows a singulated BGA chip and method for testing using a ground.
U.S. Pat. No. 5,985,695 (Freyman et al.) teaches a method for making a BGA that uses a ground.
A principle objective of the invention is to provide a dependable method of evaluating the wire bond connections that have been made to a BGA device.
In accordance with the objectives of the invention a new ground land is provided on the BGA package that allows for activating the test capability of the wire bond machine.